公司名称：誉诚（深圳）实业科技有限公司

Reset and supply management3.3.1Power supply schemes●VDD = 1.65 to 3.6 V: external power supply for I/Os and the internal regulator.Provided externally through VDD pins.●VSSA, VDDA = 1.65 to 3.6 V: external analog power supplies for ADC, reset blocks, RCsand PLL (minimum voltage to be applied to VDDA is 1.8 V when the ADC is used).VDDA and VSSA must be connected to VDD and VSS, respectively.3.3.2Power supply supervisorThe device has an integrated ZEROPOWER power-on reset (POR)/power-down reset(PDR) that can be coupled with a brownout reset (BOR) circuitry.The device exists in two versions:●The version with BOR activated at power-on operates between 1.8 V and 3.6 V.●The other version without BOR operates between 1.65 V and 3.6 V.After the VDD threshold is reached (1.65 V or 1.8 V depending on the BOR which is active ornot at power-on), the option byte loading process starts, either to confirm or modify defaultthresholds, or to disable the BOR permanently: in this case, the VDD min value becomes1.65 V (whatever the version, BOR active or not, at power-on).When BOR is active at power-on, it ensures proper operation starting from 1.8 V whateverthe power ramp-up phase before it reaches 1.8 V. When BOR is not active at power-up, thepower ramp-up should guarantee that 1.65 V is reached on VDD at least 1 ms after it exitsthe POR are